How to reduce the losses introduced by diodes in communication circuit design?

一, Device level optimization: precise matching of characteristic parameters
1. Selection of low voltage drop devices
In low-voltage DC power supply scenarios, Schottky diodes are the preferred choice due to their ultra-low voltage drop of 0.15-0.45V. The power supply of a certain type of LTE base station adopts MBR2045CT Schottky diode (Vf)= 0.38V@2A )After replacing the IN4007 silicon diode, the rectification efficiency increased from 88% to 92%, saving over 10000 yuan in electricity costs annually. For higher frequency applications, silicon carbide Schottky diodes (SiC SBDs) can still maintain a voltage drop of 0.7V at a switching frequency of 200kHz, which is 40% lower than silicon devices.
2. Quick recovery feature application
In the secondary rectification circuit of a switching power supply, the fast recovery diode (FRD) significantly reduces switching losses by shortening the reverse recovery time (trr=50-200ns). A certain type of 48V/12V communication power supply adopts C3D06060A SiC MOSFET synchronous rectification scheme, combined with FRD to achieve reverse recovery time<35ns, making the power efficiency exceed 96%, which is 4 percentage points higher than the traditional silicon scheme.
3. Temperature compensation design
In the bias circuit of photodiodes, voltage drop and temperature drift lead to degradation of receiving sensitivity. Using AT40QL022 temperature sensor and voltage divider resistor network to construct a compensation circuit, the PD bias voltage fluctuates<0.05V within the temperature range of -40 ℃ to+85 ℃, the stability of receiving sensitivity is improved by 0.3dB, and the transmission distance is extended by 2.3 kilometers.
二, Circuit level innovation: reconstructing energy conversion paths
1. Breakthrough in synchronous rectification technology
Traditional diode rectification has a fixed voltage drop of 0.7V, while synchronous rectification uses MOSFETs instead to achieve a conduction resistance of<5m Ω. A certain type of AI server power supply adopts a synchronous rectification scheme controlled by LTC4359, with a voltage drop of only 56mV at 3A current and a full load efficiency of 98.5%, which is 6 percentage points higher than the diode scheme. The key design points include:
Dead time control: achieve a 50ns dead time through the TPS28750 driver chip to avoid cross conduction
Parasitic parameter optimization: using 0402 packaging resistance to reduce lead inductance and minimize switch oscillation
Layout optimization: Control the distance between the synchronous MOS transistor and the secondary winding of the transformer within 2mm to reduce the impedance of the wiring
2. Active bridge rectifier architecture
Traditional diode bridge rectification generates a 1.4V voltage drop in PFC circuits, resulting in energy efficiency loss. The totem pole bridge free PFC topology reduces conduction losses by 60% by eliminating input diode bridges. A certain type of 6kW communication power supply uses CAS120M12BM2 silicon carbide MOSFET to construct totem pole PFC, which achieves stable operation in CCM mode at 98% efficiency, reducing the volume by 40% compared to traditional solutions.
3. RC absorption network optimization
The voltage spike generated by the reverse recovery of rectifier diodes leads to additional losses. Optimize RC absorption parameters using testing methods:
Measure the oscillation frequency f0 (e.g. 1.2MHz)
Parallel capacitor C reduces the frequency to 0.6MHz
Calculate parasitic inductance L=1/(4 π² f0 ² C)
Determine the damping resistance based on R=√ (L/C) (typical value 10-100 Ω)
A certain type of photovoltaic inverter reduces diode loss from 8.2W to 5.7W and improves efficiency by 2.8% through this method.
三, System level collaboration: Building an efficient energy ecosystem
1. Distributed power supply architecture
In large data centers, a 48V DC bus is used in conjunction with a distributed power supply module (PSU) to bring the rectification link closer to the load point. A certain type of supercomputer center reduces long-distance transmission losses through this architecture, and with the help of synchronous rectification PSU, achieves an overall energy efficiency of 94.2%, which is 7 percentage points higher than the traditional 400V AC architecture.
2. Intelligent pressure drop management chip
The TI TPS2419 chip dynamically adjusts the gate voltage of the synchronous MOS transistor by monitoring the load current in real-time (with an accuracy of ± 1%), ensuring that the conduction voltage drop is always maintained at the optimal value. In a certain type of 5G base station power supply, this technology improves light load efficiency by 8%, full load efficiency by 2%, and reduces annual carbon emissions by 12 tons.
3. Digital twin optimization
The ADI LTspice simulation platform, combined with machine learning algorithms, can predict the distribution of diode losses under different operating conditions. The power supply design of a certain type of submarine fiber optic cable repeater optimizes device selection through this technology, reducing total losses by 18% and maintenance costs by 40% within a 10-year lifespan.