What are the thermal design standards for diodes in electrical energy conversion systems?

一, Fundamentals of Thermal Design: Key Parameters and Failure Mechanisms
Definition of Core Thermal Parameters
Junction temperature (Tvj): The average temperature of a PN junction, which is a core indicator for measuring the thermal state of a device. According to the "SJ/T 2216-2015 Technical Specification for Silicon Photodiodes", the maximum allowable junction temperature for silicon-based diodes is usually 125-150 ℃, and for silicon carbide (SiC) diodes it can reach 175 ℃.
Thermal resistance (Rth): a parameter that describes the efficiency of heat transfer, divided into steady-state thermal resistance (RthJC, RthCH, RthHA) and transient thermal resistance (ZthJC, ZthCA). For example, the RthJC of the Infineon FF400R12KE3G IGBT module is 0.15K/W, indicating that for every 1 ℃ increase in junction temperature, 6.67W of power needs to be dissipated.
The main thermal failure modes of diodes include:
Thermal breakdown: The junction temperature exceeds the material limit, causing permanent damage to the PN junction.
Thermal fatigue: Repeated thermal cycles can cause cracking of the solder layer, such as fatigue cracks at eutectic welding interfaces at temperatures ranging from -40 ℃ to 125 ℃.
Parameter drift: High temperature causes an increase in conduction voltage drop (Vf) and reverse recovery charge (Qrr), for example, the Vf of Schottky diodes increases by 20% at 150 ℃ compared to 25 ℃.
二, Hot design process: closed-loop control from selection to verification
1. Device selection criteria
Material selection:
Silicon (Si): Suitable for medium and low voltage (<600V), medium frequency (<100kHz) scenarios, with low cost but high thermal resistance.
Silicon carbide (SiC): With a withstand voltage of over 1200V and a 70% reduction in switching losses, it is suitable for high-frequency (>100kHz) and high-temperature (>150 ℃) environments. For example, the C3D series SiC Schottky diode improves efficiency by 4% in 48V/12V DC-DC conversion.
Gallium Nitride (GaN): The switching frequency can reach the MHz level, but it requires a matching driver circuit and has a high cost.
Packaging form:
Surface mount packaging (SMD): such as SM4007 SMD diode, the heat dissipation area is three times larger than DO-41 packaging, making it suitable for dense layout.
Modular packaging: such as PowerBLOCK modules, integrating multiple chips and heat dissipation substrates, reducing RthJC by 50%.
2. PCB layout and heat dissipation design
Copper foil design:
The main power circuit adopts large-area copper foil, and multi-layer thermal vias (Ø 0.3-0.5mm, pitch 1mm) are arranged under the solder pads to reduce thermal resistance.
Example: In a 12kW DC-DC converter, the diode pad temperature was reduced from 105 ℃ to 78 ℃ by increasing the density of thermal vias.
Thermal isolation and independent zone:
Maintain a distance of ≥ 3mm from temperature sensitive components (such as control chips), and if necessary, slot for insulation.
Avoid narrow neck bottleneck design to ensure even heat diffusion.
3. Selection of heat dissipation scheme
Typical thermal resistance reduction effect and cost level of heat dissipation method applicable scenarios
Natural convection low power (<100W) 20-50% low
Forced air cooling medium power (100W-5kW) 50-70%
Water cooled high-power (>5kW) 70-90% high
Local hotspots (such as MOSFETs/diodes) of heat pipes/temperature equalization plates are 60-80% medium high
Case: A certain electric vehicle charging station adopts a water-cooled plate+thermal conductive silicone grease scheme, which reduces the junction temperature of SiC diodes from 140 ℃ to 95 ℃ and increases the power density to 5kW/L.
三, Thermal simulation and testing verification: Quantifying control risks
1. Thermal electric collaborative simulation
Tools: SPICE (loss calculation)+FloTHERM/CEPAK (thermal simulation).
technological process:
Input the working waveform (I2F (rms), I2F (avg), peak value V_R, fs).
Extract Vf (@ IF, Tj) and Qrr (@ dI/dt, V_R) from the data manual.
Simulate junction temperature distribution, optimize layout and heat dissipation scheme.
Result: A certain photovoltaic inverter reduced the prediction error of diode junction temperature from ± 15 ℃ to ± 3 ℃ through simulation.
2. Actual testing methods
Temperature rise test:
Use a thermocouple close to the bottom of the solder pad and an infrared thermal imager to assist in locating the hot spot.
Step up the load to increase power and record the junction temperature change curve.
High temperature aging:
Run at full load for 1000 hours at an ambient temperature of 85 ℃, and monitor the Vf drift (should be<5%).
Thermal cycle test:
-Cycle the temperature from 40 ℃ to 125 ℃ for 1000 times and check the integrity of the solder layer and packaging.
四, Industry application cases and standard compliance
1. Typical application scenarios
Electric vehicle charging station:
Adopting SiC MOSFET+SiC Schottky diode module, water-cooled heat dissipation, meeting the requirement of junction temperature ≤ 125 ℃ in IEC 61851-1 standard.
Industrial inverter:
Using FF400R12KE3G IGBT module, paired with needle shaped fin heat sink, passed UL 840 standard temperature rise test.
Data center power supply:
The 48V/12V DC-DC converter adopts GaN devices and temperature equalization plates, meeting the DOE 2025 energy efficiency standard (peak efficiency>96%).
2. Compliance with international standards
IEC 60747-1: specifies the maximum junction temperature and storage temperature range of diodes (Tstg=150 ℃, 672 hour limit).
JEDEC JESD51: Define thermal resistance testing methods, including steady-state (JESD51-1) and transient (JESD51-14) testing.
AEC-Q101: Automotive grade diodes must undergo temperature cycling testing from -40 ° C to 150 ° C to ensure 10-year reliability.